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ahb.h	267 B	View DL Edit
bpmp-abi.h	114.74 MB	View DL Edit
bpmp.h	4.95 MB	View DL Edit
common.h	1.05 MB	View DL Edit
cpuidle.h	368 B	View DL Edit
flowctrl.h	2.19 MB	View DL Edit
fuse.h	2.37 MB	View DL Edit
irq.h	386 B	View DL Edit
ivc.h	2.73 MB	View DL Edit
mc.h	5.94 MB	View DL Edit
pm.h	1.54 MB	View DL Edit
pmc.h	5.76 MB	View DL Edit
tegra-cbb.h	1.31 MB	View DL Edit

Edit file: /usr/src/kernels/5.14.0-611.34.1.el9_7.x86_64/include/soc/tegra/pm.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (C) 2014 NVIDIA Corporation
 */

#ifndef __SOC_TEGRA_PM_H__
#define __SOC_TEGRA_PM_H__

#include <linux/errno.h>

enum tegra_suspend_mode {
	TEGRA_SUSPEND_NONE = 0,
	TEGRA_SUSPEND_LP2, /* CPU voltage off */
	TEGRA_SUSPEND_LP1, /* CPU voltage off, DRAM self-refresh */
	TEGRA_SUSPEND_LP0, /* CPU + core voltage off, DRAM self-refresh */
	TEGRA_MAX_SUSPEND_MODE,
	TEGRA_SUSPEND_NOT_READY,
};

#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM) && defined(CONFIG_ARCH_TEGRA)
enum tegra_suspend_mode
tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode);

/* low-level resume entry point */
void tegra_resume(void);

int tegra30_pm_secondary_cpu_suspend(unsigned long arg);
void tegra_pm_clear_cpu_in_lp2(void);
void tegra_pm_set_cpu_in_lp2(void);
int tegra_pm_enter_lp2(void);
int tegra_pm_park_secondary_cpu(unsigned long cpu);
void tegra_pm_init_suspend(void);
#else
static inline enum tegra_suspend_mode
tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode)
{
	return TEGRA_SUSPEND_NONE;
}

static inline void tegra_resume(void)
{
}

static inline int tegra30_pm_secondary_cpu_suspend(unsigned long arg)
{
	return -ENOTSUPP;
}

static inline void tegra_pm_clear_cpu_in_lp2(void)
{
}

static inline void tegra_pm_set_cpu_in_lp2(void)
{
}

static inline int tegra_pm_enter_lp2(void)
{
	return -ENOTSUPP;
}

static inline int tegra_pm_park_secondary_cpu(unsigned long cpu)
{
	return -ENOTSUPP;
}

static inline void tegra_pm_init_suspend(void)
{
}
#endif /* CONFIG_PM_SLEEP */

#endif /* __SOC_TEGRA_PM_H__ */

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